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Control / Math / Three-Phase PLL

Symbol

Description

Three-phase Phase-Locked Loop (PLL).

Description

The three-phase Phase Locked Loop (PLL) proposes an estimation of the three-phase system frequency, signal amplitude and the phase-angle. This block implements two types of PLL which are described in Teoderescu et al.[^1]: an Synchronous Reference Frame(SRF) PLL and a Decoupled Double Reference Frame(DDSRF) PLL. At initialization, the phase angle and magnitude are derived from the input voltage vector when it is nonzero; Initial Angle and Initial Magnitude are used as fallbacks for a zero-voltage input.

Each PLL can be derived by three main functions: * a phase detector: generates an output signal that is proportional to the phase difference between the input signal and the signal generated by the PLL itself; this function will change according to the PLL type. * a low-pass filter : currently a PI controller to attenuate high-frequency components and to eliminate the steady-state phase-error. * a phase-angle generator: generates a phase-angle signal based on the estimated angular frequency (typically, it is a wrapping integrator).

Synchronous Reference Frame PLL (SRF-PLL)

The basic synchronization method in three-phase systems is the synchronous reference frame PLL(SRF - PLL) and the structure is shown below.

  1. The three-phase voltage vector expressed in the natural reference frame is converted into a rotating reference frame through the Park transformation.
  2. A feedback control loop (low-pass filter) adjusts the instantaneous phase angle by forcing the q - axis component to zero.In steady-state conditions, when the q component is null, the d-axis component corresponds to the magnitude of the input voltage vector.

This method performs effectively when the grid voltage is balanced and free of harmonic distortion. To reduce the influence of voltage harmonics on the estimation of phase angle and frequency, the PLL bandwidth should be increased. However, under unbalanced grid conditions, an excessively large control bandwidth introduces a double-frequency ripple in the PLL output signals. In this case, a Double Decoupled Reference Frame PLL should be preferred.

Schematic of the SRF PLL

Decoupled Double Reference Frame PLL (DDSRF-PLL)

The decoupled double synchronous reference frame PLL is well - adapted in case of unblanced three - phase systmes. It uses two synchronous reference frames, rotating with positive and negative synchronous speeds, respectively. These two rotating frames are used to decouple of the effect of the negative sequence component on the dq - signals, as shown in the figure below. Since the double-frequency ripple caused by the unbalanced grid condition is avoided, a higher control bandwidth compared to the SRF-PLL can be set.

Shematic of the DDSRF PLL

** Controller Design **

Two approaches to set the gains of the phase detector(K_{ i_{ pd} }) and of the loop filter which is a PI controller(K_{ p_{ lf} } and K_{ i_ { lf} }).

  • Auto approach: the parameters are automatically calculated from the nominal frequency f_0 in Hz. The calculation first converts it to the angular frequency \omega_0 = 2\pi f_0 in rad/s.
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omega0 = 2 * pi * f0; // f0 in Hz, omega0 in rad/s
if type == SRF {
   wc = omega0 / 2; // SRF PLL
}
else
{
   wc = omega0; // DDSRF PLL
}
phase_margin = 60;
Kp = wc;
Ki = wc ^ 2 * tan(phase_margin * pi / 180.0);
wf = omega0 / sqrt(2); // for DDSRF only
  • *Advanced approach * : K_{p_{lf}}, K_{i_{lf}} and \omega_f are defined by the user.

Info

The input signal of the PI controller is normalized in the PLL block so the parameters are not required to be scaled.

Important

The unit for phase-angle is the radian(rad) and the unit for the frequency is the Hertz(Hz).

References

R. Teodorescu, M. Liserre, and P. Rodriguez, "Chapter 8 - Grid Synchronization in Three-Phase Power Converters" in Grid Converters for Photovoltaic and Wind Power Systems, John Wiley and Sons, 2010.

Library

Control > Math

Parameters

Property Display Name Parameter Type Description
Mode PLL Mode ThreePhasePLLModeParameter PLL mode
ControllerDesign Controller Design PLLControllerDesignParameter Controller design method
Kp_lf Loop Filter Proportional Gain (Kp_lf) DoubleParameter Loop Filter Proportional Gain
Ki_lf Loop Filter Integral Gain (Ki_lf) DoubleParameter Loop Filter Integral Gain
Wf Decoupling Filter Pulsation (Wf) DoubleParameter DDSRF decoupling filter pulsation [rad/s]
InitFreq Initial Frequency [Hz] DoubleParameter Initial Frequency [Hz]
InitMag Initial Magnitude DoubleParameter Initial Magnitude
InitAngle Initial Angle [deg] DoubleParameter Initial Angle [deg]

Pins

Property Pin Name Type Description
A A ControlIn Phase-A input signal
B B ControlIn Phase-B input signal
C C ControlIn Phase-C input signal
Freq Freq ControlOut Estimated Frequency [Hz]
Angle Angle ControlOut Estimated Phase-A Angle [rad]
Mag Mag ControlOut Estimated phase magnitude

Default Size

Width Height
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