OR
Description
The truth table for the Or Logic Gate is:
In1 | In2 | Out |
---|---|---|
0 | 0 | 0 |
0 | 1 | 1 |
1 | 0 | 1 |
1 | 1 | 1 |
Important
Non-zero inputs are treated as 1
Library
Control > Logic
Pins
Name | Description |
---|---|
In1 | Input 1 |
In2 | Input 2 |
Out | Output |
Parameters
Name | Description |
---|---|
SamplingTime | -none or 0: No sampling. The system will be solved in the Newton loop (default). -auto: Inherit the sampling time of its source device. -Sampling Period: defined in seconds. |